Nokia DBOX2 lässt sich nicht flashen. Verifizieren klappt n.

[Smellow]

Hersteller: Nokia
Typenbezeichnung: DBOX2
Chassi:

Vorhandene Messgeräte: Digital oder Analogvoltmeter
Schaltplan vorhanden: Ja
Dein Wissensstand:

Fehlerbeschreibung und Nachricht:
Hallo Leute,

brauche mal wieder euren Rat. Habe ne günstige Nokia Sat Box geschossen mit dem Fehler "Kein System". Kein Problem dachte ich, neues Image und gut ist, aber das zickige Ding bleibt immer beim verifizieren hängen (siehe Bootlog).
Wo liegt das Problem? Hat der Vorbesitzer nen falsches Script fürs Debuggen genommen oder voran kanns liegen?

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID xxxxxxxxxxxxxxxxxx
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/16/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.73.1, My IP 192.168.73.202
debug: Sending TFTP-request for file C/dboxifa_tmp/tftpboot/u-boot
will verify ELF image, start= 0x800000, size= 140336
verify sig: 263
boot net: boot file has no valid signature
Branching to 0x40000


U-Boot 1.1.2 (Tuxbox) (Jun 12 2005 - 13:44:14)

CPU: PPC823ZTnnA at 67.200 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: DBOX2, Nokia, BMon V1.0
Watchdog enabled
I2C: ready
DRAM: 32 MB
FLASH: 8 MB
FB: ready
LCD: ready
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
BOOTP broadcast 1
Using SCC ETHERNET device
TFTP from server 192.168.73.1; our IP address is 192.168.73.202
Filename 'C/dboxifa_tmp/tftpboot/u-boot'.
Load address: 0x100000
Loading: Using SCC ETHERNET device
TFTP from server 192.168.73.1; our IP address is 192.168.73.202
Filename '/tftpboot/logo-lcd'.
Load address: 0x100000
Loading: ##
done
Bytes transferred = 7680 (1e00 hex)
BOOTP broadcast 1
Using SCC ETHERNET device
TFTP from server 192.168.73.1; our IP address is 192.168.73.202
Filename 'C/dboxifa_tmp/tftpboot/u-boot'.
Load address: 0x100000
Loading: Using SCC ETHERNET device
TFTP from server 192.168.73.1; our IP address is 192.168.73.202
Filename '/tftpboot/logo-fb'.
Load address: 0x100000
Loading: ####################################
done
Bytes transferred = 179877 (2bea5 hex)

Options:
1: Console on null
2: Console on ttyS0
3: Console on framebuffer
Select option (1-3), other keys to stop autoboot: 0

Bank # 1: INTEL 28F320C3B (32M, bottom boot sect), 32 bit

Size: 8192 kB in 71 Sectors

Using SCC ETHERNET device
TFTP from server 192.168.73.1; our IP address is 192.168.73.202
Filename 'kernel-yadd'.
Load address: 0x100000
Loading: #################################################################
#################################################################
####################
done
Bytes transferred = 763552 (ba6a0 hex)
...............................................................
Un-Protected 63 sectors
## Booting image at 00100000 ...
Image Name: dbox2
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 763488 Bytes = 745.6 kB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Linux version 2.4.27-dbox2 (dietmarw@linux) (gcc version 3.3.5) #1 So Mr 27 06:5
0:40 CEST 2005
On node 0 totalpages: 8192
zone(0): 8192 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: console=ttyS0 root=/dev/nfs rw nfsroot=192.168.73.1:C/dboxi
fa_tmp/yaddroot/ ip=192.168.73.202:192.168.73.1::::ff
Decrementer Frequency = 252000000/60
m8xx_wdt: active wdt found (SWTC: 0xFFFF, SWP: 0x1)
m8xx_wdt: keep-alive trigger installed (PITC: 0x12C0)
Console: colour dummy device 80x25
Calibrating delay loop... 66.96 BogoMIPS
Memory: 30560k available (1296k kernel code, 440k data, 72k init, 0k highmem)
Dentry cache hash table entries: 4096 (order: 3, 32768 bytes)
Inode cache hash table entries: 2048 (order: 2, 16384 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 8192 (order: 3, 32768 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
devfs: v1.12c (2002081 Richard Gooch (<a href="mailto:**********">**********</a>)
devfs: boot_options: 0x1
JFFS2 version 2.2. © 2001-2003 Red Hat, Inc.
Squashfs 2.1-r2 (released 2004/12/15) © 2002-2004 Phillip Lougher
i2c-core.o: i2c core module version 2.6.1 (20010830)
i2c-dev.o: i2c /dev entries driver module version 2.6.1 (20010830)
CPM UART driver version 0.04
ttyS0 at 0x0280 is on SMC1 using BRGttyS1 at 0x0380 is on SMC2 using BRG2
pty: 256 Unix98 ptys configured
eth0: CPM ENET Version 0.2.dbox2 on SCC2, 00:50:9c:11:db:78
D-Box 2 flash driver (size->0x800000 mem->0x10000000)
D-Box 2 flash memory: Found 2 x16 devices at 0x0 in 32-bit mode
Intel/Sharp Extended Query Table at 0x0035
cfi_cmdset_0001: Erase suspend on write enabled
Using word write method
Creating 6 MTD partitions on "D-Box 2 flash memory":
0x00000000-0x00020000 : "BR bootloader"
0x00020000-0x00040000 : "flfs (u-boot)"
0x00040000-0x00720000 : "root (cramfs)"
0x00720000-0x00800000 : "var (jffs2)"
0x00020000-0x00800000 : "flash without bootloader"
0x00000000-0x00800000 : "complete flash"
Linux video capture interface: v1.00
mice: PS/2 mouse device common for all mice
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 2048 bind 4096)
IP-Config: Guessing netmask 255.255.255.0
IP-Config: Complete:
device=eth0, addr=192.168.73.202, mask=255.255.255.0, gw=255.255.255.255,
host=192.168.73.202, domain=, nis-domain=(none),
bootserver=192.168.73.1, rootserver=192.168.73.1, rootpath=
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
Looking up port of RPC 100003/2 on 192.168.73.1
Looking up port of RPC 100005/1 on 192.168.73.1
VFS: Mounted root (nfs filesystem).
Mounted devfs on /dev
Freeing unused kernel memory: 72k init
init started: BusyBox v0.60.2 (2002.02.26-14:29+0000) multi-call lcd.o: init lc
d driver module
lcd.o: found KS0713/SED153X lcd interface


















dbox2 - ImageFlashingAssistent

- Hallenberg.com -

Wilkommen auf ihrer dbox2


Starte Backup....
Schreibe Backup: 8064k von 8064k (100%)
Backup abgeschlossen!
Der Flashprozess wird nun gestartet...
Lsche Sektoren: 63 von 63 (100%)
Schreibe Daten: 8064k von 8064k (100%)
`smpch`t xSegmentation fault064k (1%)File does n`t s`em po m`t flph ata Fipt
Flashen beundet!

Please press Enter to activate this console.

 

[dboxer]

würde den fehler mal im flash bereich suchen bzw. die flash ic exten programmieren um zu sehen ob soft oder hardwarefehler vorliegt

 

[Smellow]

Also ich hab jetzt mal reingeschaut und festgestellt, dass ne 16MB Ramerweiterung auf dem Board hängt. Ich würde behaupten dass da das Problem liegt. Nehme ich sie runter und versuche so zu flashen, dann startet der Bootmanager immer wieder neu (Endlosschleife).

Wie kann ichs trotzdem schaffen??

 

[dboxer]

mit angepasstem bootmanager flashen dann geht sie auch nur mit 16 mb aber die paltine macht eigentlich selten so nen fehler

 

[Smellow]

Hier mal die Log wenn ich ohne Erweiterung versuche zu flashen:


debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.73.1, My IP 192.168.73.202
debug: Sending TFTP-request for file C/dboxifa_tmp/tftpboot/u-boot
will verify ELF image, start= 0x800000, size= 140008
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


U-Boot 1.1.6 (Tuxbox) (Jan 8 2007 - 22:58:00)

CPU: PPC823ZTnnA at 67.200 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: DBOX2, Nokia, BMon V1.0
Watchdog enabled
I2C: ready
DRAM: 16 MB

debug: DDF: Calibrating delay loop... debug: DDF: Calibrating delay loop... deb
ug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.73.1, My IP 192.168.73.202
debug: Sending TFTP-request for file C/dboxifa_tmp/tftpboot/u-boot
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.73.1, My IP 192.168.73.202
debug: Sending TFTP-request for file C/dboxifa_tmp/tftpboot/u-boot
will verify ELF image, start= 0x800000, size= 140008
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


U-Boot 1.1.6 (Tuxbox) (Jan 8 2007 - 22:58:00)

CPU: PPC823ZTnnA at 67.200 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: DBOX2, Nokia, BMon V1.0
Watchdog enabled
I2C: ready
DRAM: 16 MB

debug: DDF: Calibrating delay loop... debug: DDF: Calibrating delay loop... deb
ug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.73.1, My IP 192.168.73.202
debug: Sending TFTP-request for file C/dboxifa_tmp/tftpboot/u-boot
will verify ELF image, start= 0x800000, size= 140008
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


U-Boot 1.1.6 (Tuxbox) (Jan 8 2007 - 22:58:00)

CPU: PPC823ZTnnA at 67.200 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: DBOX2, Nokia, BMon V1.0
Watchdog enabled
I2C: ready
DRAM: 16 MB

debug: DDF: Calibrating delay loop... debug: DDF: Calibrating delay loop... deb
ug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDFFdebug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memdebug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.73.1, My IP 192.168.73.202
debug: Sending TFTP-request for file C/dboxifa_tmp/tftpboot/u-boot
will verify ELF image, start= 0x800000, size= 140008
verify sig: 262
boot net: boot file has no valid signature

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPSr


Hier mal mit Erweiterung:

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/16/08

debug: DDF: Calibrating delay loop... debug: DDF: Calibrating delay loop... deb
ug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/16/08
WATCHDOG reset enabled
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/16/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.73.1, My IP 192.168.73.202
debug: Sending TFTP-request for file C/dboxifa_tmp/tftpboot/u-boot

debug: DDF: Calibrating delay loop... debug: DDF: Calibrating delay loop... deb
ug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/16/08
WATCHDOG reset enabled
dbox2:root> unrecognized command oot net flash, args[0][0] 0x6f

Wie gesagt er startet immer wieder von vorn.. Beim Selbsttest geht er auch bis zur Zeile, wo ich dann Boot net eingeben würde, aber er startet schon ab diesem Punkt immer neu.

Die Flashbausteine habe ich schon gewechselt. Problem bleibt!!

RAM Bausteine??

 

[Smellow]

So jetzt hab ich endlich mal nen brauchbaren Speichertest hinbekommen und ich kann zwar die Logs nicht genau lesen, aber ich würd sagen, dass der Speicher onboard sowie die Erweiterung einen Fehler hat oder?? :

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-98.87.d1.06.00.00-e8
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/16/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: failed at 0xfffff8
debug: MarchTest: debug: failed at 0xfffff8
debug: PermTest: debug: failed at 0xc00006
debug: Extension Memory tests (0x1000000 -- 0x2000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: failed at 0x1000000

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b

regards smellow

 

[Smellow]

Ach so und falls es jetzt der Speicher ist, kann ich dann aus einer anderen Nokia Box die 2x16MB onboard RAM ohne bedenken verpflanzen und die Erweiterung rauslassen??

 

[Smellow]

Jawoll... Habs hinbekommen. Habe die RAMs getauscht und jetzt 32MB Onboard. Lässt sich wieder wunderbar flashen und auch sonst funzt alles.

Vielen Dank Jungs....